1. Field of the Invention
The present invention relates to a semiconductor memory device and a memory card, and particularly relates to a semiconductor memory device in which a reduction in the circuit area of a row select circuit is realized and a memory card including such a semiconductor memory device.
2. Related Background Art
In a memory cell of a nonvolatile semiconductor memory device, a charge storage layer is provided between a gate electrode and a substrate with a gate insulating film therebetween. To inject charge into this charge storage layer or extract charge therefrom, it is necessary to apply a boosted voltage which is higher than a power supply voltage to the memory cell (See Japanese Patent Application Laid-open No. Hei 11-238391, for example).
A logic circuit driven by the power supply voltage requires a transistor capable of supplying a desired current, and a logic circuit driven by the boosted voltage requires a transistor having a desired withstand voltage. To fulfill both these requirements, a peripheral circuit of the nonvolatile semiconductor memory device is composed of normal transistors to which a voltage nearly equal to the power supply voltage is supplied and high withstand voltage transistors to which a voltage higher than the power supply voltage is supplied. The film thickness of a gate insulating film of the high withstand voltage transistor is thicker than that of a gate insulating film of the normal transistor.
The sizes of a source, a drain, and a gate of a memory cell are reduced as the generation of fabrication advances, and the sizes thereof of the normal transistor are also correspondingly reduced. However, in the present situation, the high withstand voltage transistor is almost unchanged since the Program voltage is not decreased. Therefore, it can be said that the circuit area of a row select circuit is determined by the size and circuit configuration of the high withstand voltage transistors. Accordingly, as the generation of fabrication advances, in order to reduce the circuit area, it becomes desirable to reduce the number of high withstand voltage transistors even if the number of normal transistors is increased.